diff --git a/Boards/M5stackCoreS3/Source/InitBoot.cpp b/Boards/M5stackCoreS3/Source/InitBoot.cpp index 6b67e201..4a863104 100644 --- a/Boards/M5stackCoreS3/Source/InitBoot.cpp +++ b/Boards/M5stackCoreS3/Source/InitBoot.cpp @@ -57,6 +57,12 @@ bool initGpioExpander() { // Boost enable p1_state |= (1U << 7U); + /* AW9523 P0 is in push-pull mode */ + if (!aw9523->writeCTL(0x10)) { + TT_LOG_E(TAG, "AW9523: Failed to set CTL"); + return false; + } + if (!aw9523->writeP0(p0_state)) { TT_LOG_E(TAG, "AW9523: Failed to set P0"); return false; diff --git a/Drivers/AW9523/Source/Aw9523.cpp b/Drivers/AW9523/Source/Aw9523.cpp index e1c0a889..bf6c0ee7 100644 --- a/Drivers/AW9523/Source/Aw9523.cpp +++ b/Drivers/AW9523/Source/Aw9523.cpp @@ -2,6 +2,7 @@ #define AW9523_REGISTER_P0 0x02 #define AW9523_REGISTER_P1 0x03 +#define AW9523_REGISTER_CTL 0x11 bool Aw9523::readP0(uint8_t& output) const { return readRegister8(AW9523_REGISTER_P0, output); @@ -11,6 +12,10 @@ bool Aw9523::readP1(uint8_t& output) const { return readRegister8(AW9523_REGISTER_P1, output); } +bool Aw9523::readCTL(uint8_t& output) const { + return readRegister8(AW9523_REGISTER_CTL, output); +} + bool Aw9523::writeP0(uint8_t value) const { return writeRegister8(AW9523_REGISTER_P0, value); } @@ -19,6 +24,10 @@ bool Aw9523::writeP1(uint8_t value) const { return writeRegister8(AW9523_REGISTER_P1, value); } +bool Aw9523::writeCTL(uint8_t value) const { + return writeRegister8(AW9523_REGISTER_CTL, value); +} + bool Aw9523::bitOnP1(uint8_t bitmask) const { return bitOn(AW9523_REGISTER_P1, bitmask); } diff --git a/Drivers/AW9523/Source/Aw9523.h b/Drivers/AW9523/Source/Aw9523.h index 3325c09c..1b711dfb 100644 --- a/Drivers/AW9523/Source/Aw9523.h +++ b/Drivers/AW9523/Source/Aw9523.h @@ -15,9 +15,11 @@ public: bool readP0(uint8_t& output) const; bool readP1(uint8_t& output) const; + bool readCTL(uint8_t& output) const; bool writeP0(uint8_t value) const; bool writeP1(uint8_t value) const; + bool writeCTL(uint8_t value) const; bool bitOnP1(uint8_t bitmask) const; };